Welcome to my projects page

Professional projects (5)
Educational projects (7)

Professional projects
Projects that have been used professionally
Olive and Vineyard Registry of Greece: The JAVA Front end
Description: Designed and developed the JAVA front end for review and modification of the Geographic and Descriptive Database concerning the Olive and Vineyard Registry of Greece. 
Keywords: GIS, Oracle Spatial, Olive and Vineyard Registry, JAVA front end 
Status: Complete (December 2003 - September 2004)

HarmoniQuA: The guideline and glossary tool (JAVA version)
Description: Implemented the JAVA version of the "Guideline tool" for the HarmoniQuA project. 
Keywords: HarmoniQuA guideline - MOST tool, glossary tool, knowledge base, project management 
Status: Complete (September 2003 - January 2004)

Main Studio: Alpha Player
Description: An embedded compact mp3 player based on linux with real-time compressor, excellent mixing, track and advertisement management. 
Keywords: Alpha player, compact mp3 player, SUSE linux, VIA EPIA, mini-itx 
Status: Complete (2001 - 2004)

Thalis: Power Factor Corrector Module
Description: Doing consulting research for the improvement and cost reduction for an industrial power factor corrector with automatic capacitor recognition. 
Keywords: Power factor corrector - regulator, PIC 16F877, LabVIEW, MPLAB, picc, capacitor banks 
Status: Complete (January 2003 - March 2004)

CERN: Information Service Data Logger
Description: Information Service Data Logger is an extensible JAVA utility being able to retrieve, present, analyze, store and supervise debug data from the DAQ of the Atlas detector on the LHC experiment. 
Keywords: CERN, JAVA, information service CORBA interface, data logger and supervisor, JFreeChart 
Status: Complete (July and August 2003)

Educational projects
Projects for educational purposes
Core Services: A new design methodology for MPSoCs
Description: My MSc thesis for the Microelectronics System Design MSc at University of Southampton. Extended Xilinx’s high-end FPGA platform with a Web Services inspired mechanism for interoperable on-chip communication which supports dynamic reconfiguration, fault tolerance and run-time mapping. 
Keywords: Multiprocessor SoC, Platform based design, Web Services, CoreConnect, Xilinx, FPGA, AES, MP3 
Status: Complete (April-October 2006)
Significant research effort in platform based design has given numerous interesting and innovative solutions to some of the recent VLSI design automation problems. Emerging Multi-Processor System-on-Chips (MPSoC) feature reconfigurable components and hierarchical busses or Networks-on-Chips as communication infrastructure.

Core Services methodology reported in this dissertation uses mechanics inspired by Web Services that most software engineers are already familiar with to exploit efficiently dynamic partial reconfiguration and run-time mapping of current Systemon- Chips (SoCs) to provide guaranteed performance increase and fault tolerance ondemand. Core services can be efficiently implemented in platforms with communication infrastructures including busses and network-on-chips.

Core Services define a function-level abstraction of the underlying hardware processing elements and a resource management mechanism (Service Broker) which optimises at run-time the mapping of functionality to available processing resources. Service Broker also measures the frequency of requests and configures reconfigurable elements to increase system’s performance. Fault tolerance is considered as a resource management problem and thus solved transparently by the Core Services framework.

We validate Core Services methodology by applying it on Xilinx’s reconfigurable platform for high-end FPGAs. The stack of software and hardware components for communication, data management and function virtualization is implemented and evaluated. A user-friendly application interface (API) and a powerful device driver for MontaVista embedded Linux are provided. Hardware and software components are created automatically by an easy to use platform building application able to run on Windows and UNIX workstations. The platform is being evaluated with two computationally intensive applications, AES encryption and MP3 decoding that get accelerated in different levels of granularity. We conclude by presenting our benchmarking results on a complex use case of these applications.
Related files Size  
The final report of my dissertation 1.6 MB Download
Related links  
Professor Bashir Al-Hashimi's home page Visit
Paul Rosinger's home page Visit

Software Power Estimation
Description: During the Digital System Synthesis module in my MSc at Southampton, I created this highly reusable framework that allows the estimation of power consumption of a processor by profiling its software. 
Keywords: software power estimation, bochs, jouletrack 
Status: Complete (April - May 2006)

MOUFA: Machine Of Unknown Future Architecture
Description: MOUFA is a microprocessor designed by my team for the VLSI Design Project module during my MSc at Southampton. The processor, the software tools that accompany it and the design flow that we followed have innovative features, worth studying.  
Keywords: MOUFA, CISC micro-processor, test, VLSI design flow 
Status: Complete (February - May 2006)

Applications of Radon transform in Image Recognition and implementation on a Digital Signal Processor (DSP)
Description: My MSc thesis presented at 29/10/2004 at NTUA. By combining the power of radon (hough) transform and the performance of a state of the art DSP (Analog Devices' BF 533) we are able to solve in real time a complex image recognition problem with a standalone low cost compact device. 
Keywords: Radon and Hough transform, BF 533, image recognition, ATLAS detector, LHC experiment, ITU 656 
Status: Complete (May - October 2004)

Design of a real-time eye tracking, blink feature and pupil meter system
Description: This is the report for a quick research I did for the Greek team of the Sensation European project 
Keywords: Lid and eye tracker, pupil meter, Sensation project 
Status: Complete (January 2005)

Timing Attacks on Cryptosystems: RSA
Description: The fourth part of the coursework for "Cryptography and Data Compression" module on my MSc at Southampton was on implementing and evaluating Kocher's timing attack on RSA. 
Keywords: Timing Attack, RSA, Kocher, modular exponentiation 
Status: Complete (April - May 2006)

Multilayer thin film design and wideband optical monitoring of deposition process
Description: Improving the process of design and deposition of multilayer thin film optical filters. Assocciated article was presented at the "8th ICATPP Conference" 
Keywords: Pierre Auger Observatory, multi layer thin films, simulation, optimum design, deposition, wideband optical monitoring, grating spectrograph, AVR AT2313, LabVIEW, Matlab 
Status: Complete (June 2002, June 2003, October 2003)

Professional or not, all these projects share a common attribute; They work!